3 Semester Credit Hours

Course Description

Digital technology is ubiquitous in the digital millennium. Microprocessors, commercial audio and video systems, wireless communication systems, high-definition televisions, industrial control systems, domestic appliances, consumer electronic products, and myriad other real-world systems primarily employ digital design methodologies in order to process information very rapidly and with high fidelity. The main objective of this introductory course is to provide in-depth knowledge and comprehensive understanding to students in electrical and computer engineering of design and implementation methodologies of digital systems. The course covers a wide range of topics including foundation of digital systems (Boolean algebra), logic minimization and optimization using both manual (Karnaugh maps) and automated (Quine-McCluskey algorithm) methods, system implementation using programmable logic devices like FPGA, ROM and PLA, microelectronics implementation technologies such as CMOS and TTL, hardware description language like Verilog, design of clocked synchronous and clock-less asynchronous systems, design of computer memory systems, microprocessor architecture, and design of real-world systems like traffic light controller, vending machine, railway crossing controller, and so on.

Prerequisites

• One year of college-level calculus (NMTH 1111 and NMTH 1112)
• A course in linear algebra and differential equations (NMTH 2301)
• An introductory course in electrical and electronic circuits (NEEI 2321)
• A course in linear systems and circuits (NEEI 2322)
  

Course Objectives

• An in-depth understanding of laws and theorems of Boolean (aka switching) algebra that can be applied to design digital systems manually as well as to develop computer programs for automated synthesis of digital systems.
  
• Ability to design and implement a digital system from its problem specification written in plain English.
  
• Ability to convert a design from one style of implementation to another style. For example, ability to convert a design with arbitrary Boolean functions to all NAND or all NOR gates, or for that matter by using multiplexers or decoders.
  
• Ability to minimize a large digital system in terms of various cost metrics like number of gates, number of silicon transistors or switches required,  and the number of input signal lines that reflect the labor cost. 
  
• Ability to design a Finite State Machine (FSM) from a problem specification in the form English language, state table, state diagram, Verilog hardware description language, etc. 
  
• Ability to understand the clocking requirement in a digital system design and how to debug clock-induced system failures.
  
• Ability to debug a digital system that may fail due to propagation of design-induced signal glitches (static and dynamic hazards), set-up and hold time violations in storage devices like registers, state flip flops, etc. 
  
• Ability to design a clock-less digital system with feedback connections such as the system can trigger with the arrival of input signals (fundamental mode of operation) without experiencing reliability problems like critical race and oscillations.
  
• Ability to understand timing diagrams and data sheets of digital devices like static random access memory (SRAM), dynamic random access memory (DRAM), arithmetic logic units (ALU), combinational building blocks, control logic of a microprocessor, etc. 
  
• Ability to write a sequential digital system by using Verilog HDL and verify the functional correctness of the design.
  
• Ability to recognize digital building blocks that are available in the form of industrial MSI and LSI design modules and their performances are specified in the published data-sheets.

Course Topics

The following topics will be covered in the order given.

• Introduction to Digital Systems
• Boolean Algebra
• Applications of Boolean Algebra
• Basic Gates, Truth Tables, and Logic Circuits
• CMOS Implementation
• Timing Diagrams (Part 1)
• Timing Diagrams (Part 2)
• Logic Design Problem 1
• Logic Design Problem 2
• Combinational Logic Minimization
• Optimization by Using Karnaugh Maps
• Optimization by Using Q-M Method
• Optimization by Using Q-M and Petrick Methods
• Decoders and Multiplexers
• MSI Building Blocks
• Programmable Logic Implementation: FPGA
• ROM and PLA Implementation of Boolean Functions
• Foundations of Sequential Design
• Flip Flop Analysis
• Timing Diagrams for Flip-Flop Circuits
• Flip-Flop Based Sequential Building Blocks: Counters
• Synthesis of Counters
• Shift Registers
• Analysis of FSM
• Design of FSM
• MSI Sequential Building Blocks
• State Minimization Procedure
• Arithmetic Logic Number Conversion and Representation
• Arithmetic Logic Adder Configurations
• Arithmetic Logic Unit
• Multiplier Design
• Memory Systems I
• Memory Systems II
• Asynchronous Circuit Analysis
• Asynchronous Circuit Design