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Inside.Waldenu.Edu>Degree Program Resources>Current Students - NTU - Fall 2005 Course Sched - Page>Current Students - NTU - Course Desc - NEEP 6111
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NEEP-6111 Computer Architecture (CA 714) Instructor - David A. Patterson, University of California, Berkeley
4 Semester Credit Hours
Course Description This prototype course is offered by a winner of the UCB Distinguished Teaching Award. It captures the excitement and creativity of the breakthrough ideas put forth in the textbook "Computer Architecture: A Quantitative Approach," by Hennessy and Patterson, which encourages direct empirical measurement of interesting systems, as well as analytical evaluation and simulation in the design and evaluation of instruction sets. Additionally, This course focuses on the techniques of quantitative analysis and evaluation of modern computing systems, such as the selection of appropriate benchmarks to reveal and compare the performance of alternative design choices in system design. The emphasis is on the major component subsystems of high performance computers: pipelining, instruction level parallelism, memory hierarchies, input/output, and network-oriented interconnections. Students will undertake a major computing system analysis and design project of their own choosing.
Prerequisites
Undergraduate level computer architecture course. Knowledge of instruction set design, data-path and controller design and assembly language programming. Familiarity with register transfer notation, memory systems, addressing, microprogramming, and computer arithmetic, or equivalent experience.
Course Objectives
At the end of this course the participant will know the fundamentals of computer architecture, be able to apply this knowledge across a range of system design problems, and understand how technological forces shape the systems we use today and those on the horizon, particularly those towards which the industry is rapidly moving.
Course Topics
Fundamentals of Computer Architecture, Instruction Set Architecture, Pipelining, Instructional Level Parallelism, VLIW, EPIC, Vector Processors, Digital Signal Processors, Memory Hierarchy, Input/Out and Storage, Networks and Interconnection Technology, and Multiprocessors. There are also guest lectures on on-going architecture research projects at Berkeley: Reconfigurable Microprocessors ("BRASS"), Embedded Processor in DRAM ("IRAM"), and Systems of Systems ("Millennium"). Textbook
The textbook is currently being revised and is only available in a draft version. UC Berkeley will distribute chapters to students in a hard copy version only. If a student drops the course, all course materials must be returned to UC Berkeley. . Disclaimer: Textbook information is provided only to give more information about the course. Do Not use this information to purchase a textbook. Up-to-date information will be provided when you register.
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